1. Field of the Invention
The present invention relates to a method for fabricating a semiconductor device. More particularly, the present invention relates to a method for fabricating a semiconductor device that can improve the efficiency of the device by rounding corners of a trench used in forming a Shallow Trench Isolation (STI).
2. Discussion of the Related Art
Generally, semiconductor devices such as memory devices and image sensors are fabricated by integrating a plurality of unit devices into a semiconductor substrate. To realize high-integration of a semiconductor device, a plurality of active regions are defined to correspond to a plurality of unit devices. Then, field regions are defined to form field oxide layers or device isolation layers.
To fabricate a semiconductor device, the field oxide layer may be formed in the field region. However, with the recent trend toward the high-integration of semiconductor devices, a trench may be formed in the field region. The trench is filled with an insulating layer, such as a TEOS layer, and then a CMP (Chemical Mechanical Polishing) process is performed so that the TEOS layer is left only inside the trench.
A method for forming the Shallow Trench Isolation according to the related art will be explained as follows.
FIGS. 1A to 1E are cross sectional views of a device fabricated by a method for forming the Shallow Trench Isolation of a semiconductor device according to the related art.
As shown in FIG. 1A, a pad insulating layer 2 is formed on a semiconductor substrate 1. Then, a photoresist 3 is formed on the pad insulating layer 2. The pad insulating layer 2 may have a stacked structure of pad oxide, pad nitride and TEOS (Tetra Ethyl Ortho Silicate) oxide.
Referring to FIG. 1B, the photoresist 3 is selectively removed by exposure and development using a mask for defining active and field regions. Then, predetermined portions of the photoresist 3 corresponding to the field regions are removed.
As shown in FIG. 1C, regions in the pad insulating layer 2 and the semiconductor substrate 1 corresponding to the field regions are etched at a predetermined depth using the patterned photoresist 3 as a mask. Trenches 4 are thereby formed.
As shown in FIG. 1D, inside each of the trenches 4, the semiconductor substrate 1 is thermally oxidized to round corners in each of the trenches 4. Accordingly, a thermal oxide layer is formed in each of the trenches 4.
As shown in FIG. 1E, the pad insulating layer 2, the photoresist 3 and the thermal oxide layer are removed. Then, an O3 TEOS layer is formed in an entire surface of the semiconductor substrate 1, to fill the respective trenches 4. Then, a CMP (Chemical Mechanical Polishing) process is applied to the formed O3 TEOS layer. The O3 TEOS layer is left only inside the trenches 4, thereby forming the Shallow Trench Isolation 6.
Unit devices may be subsequently formed in the respective active regions which are isolated from one another by the Shallow Trench Isolation 6.
However, the method for fabricating the semiconductor device according to the related art has the following disadvantages.
In the method for fabricating the semiconductor device according to the related art, the thermal oxidation process is applied to round the corners of the trench formed in the field region. However, it is difficult to round the corners of the trench even though the thermal oxidation process is applied. Accordingly, a leakage current occurs in the corners of the trench, thereby causing deterioration in the semiconductor device.